Simultaneous switching noise (SSN) is defined as a noise voltage induced onto a single victim Input/Output (I/O) pin of an electronic component due to the switching behavior of other aggressor I/O pins in the device. This noise is considered in the context of either an output I/O driver victim or an input I/O buffer victim. Noise injected onto the pin of an output buffer will be attenuated by the effects on the connected transmission line, termination network, and receiver load. The shape of this noise pulse at the receiver, the far-end, is critical when considering SSN effects on output buffers. This far-end pulse can cause timing and voltage level errors. In the case of noise induced onto an input pin, there is no transmission line noise attenuation to consider. However, the noise, directly sampled by the near-end input buffer, can still cause timing and voltage level errors.
As the complexity and size of Integrated Circuits (ICs) grows, so does the amount of time required to perform SSN analysis on a circuit design, which can be in the order of hours or days. In practice, this translates in a limit to the number of possible IO configurations that a circuit designer can test using SSN techniques.
It is in this context that embodiments of the invention arise.